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PAN3201DH
PAN3201DH LOW POWER CMOS OPTICAL MOUSE SENSOR General Description
The PAN3201DH is a high performance and low power CMOS process optical mouse sensor with DSP integration chip that serves as a non-mechanical motion estimation engine for implementing a computer mouse. Features Single power supply Precise optical motion estimation technology Complete 2-D motion sensor No mechanical parts Optical Lens 1:1 18.432 MHz 37 inches/sec @ FCLK =24.576MHz 400/500/600/800(default)/1000 cpi 3000 frames/sec 4.5mA @Mouse moving (Normal) 600uA @Mouse not moving (Sleep1) 100uA @Mouse not moving (Sleep2) 30uA @Power down mode Shrunk DIP20 Power Supply 1.73V~1.87V (VDDD,VDDA, VDD)
2.5V~2.9V (VDD)
Key Specification
Accurate motion estimation over a wide range System Clock of surfaces High speed motion detection up to 37 inches/sec Speed High resolution up to 1000cpi Resolution Resolution setting by two method CPI IO trap select pin (pin15) to 400, 600, Frame Rate 800 cpi Register setting to 400, 500, 600, 800, 1000 Operating cpi Current Power down pin and register setting for low power dissipation. Package Power saving mode during times of no movement Serial Interface for programming and data transfer SWKINT pin to wake up micro-controller when sensor wakeup from sleep mode
Ordering Information Order number PAN3201DH I/O CMOS output Resolution 800 cpi
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1. Pin Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name VSS_LED LED OSCOUT OSCIN VDDD VSSD VSSA VDD VDDA VREF YA YB XA XB CPI NC SWKINT SCLK SDIO PD Type GND OUT OUT IN PWR GND GND PWR PWR BYPASS OUT OUT OUT OUT IN OUT IN I/O IN Definition LED ground LED control Resonator output Resonator input Chip digital power, 1.8V Chip digital ground Chip analog ground Chip I/O power voltage, 1.73V~1.87V(Vdd1) or 2.5V~2.9V(Vdd2) Chip analog power, 1.8V Analog voltage reference YA quadrature output YB quadrature output XA quadrature output XB quadrature output CPI IO trap select pin Pull-high to VCC (Vdd1 or Vdd2) : 600 cpi Pull-low to GND : 800 cpi Floating : 400 cpi No connection Sensor wakeup interrupt Serial interface clock Serial interface bi-direction data Power down pin, active high
1
20
LB
RB
+Y
1
20
10
11
10
Figure 1. Top view pinout
11
+X
Figure 2. Top view of mouse
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2. Block Diagram and Operation
LED VSS_LED LED DRIVER POWER ON RESET CMOS IMAGE SENSOR VDD
QUADRATURE OUTPUT
XA XB YA YB
VDDD VDDA VSSD VSSA
1.8V POWER
DIGITAL SIGNAL PROCESSOR
PD VREF
SERIAL INTERFACE
SCLK SDIO
SERIAL INTERFACE
CONTROL REGISTER
OSCILLATOR
OSCIN OSCOUT
RESONATOR
Figure3. Block diagram The PAN3201DH is a high performance and low power CMOS-process optical mouse sensor with DSP integration chip that serves as a non-mechanical motion estimation engine for implementing a computer mouse. It is based on new optical navigation technology, which measures changes in position by optically acquiring sequential surface images (frames) and mathematically determining the direction and magnitude of movement. The sensor is in a 20pin optical package. The output format is two-channel quadrature (X and Y direction), which emulates encoder phototransistors. The current X and Y information are also available in registers accessed via a serial port.
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3. Registers and Operation
The PAN3201DH can be programmed through registers, via the serial port, and DSP configuration and motion data can be read from these registers. All registers not listed are reserved, and should never be written by firmware.
3.1 Registers
Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 Name Product_ID Product_ID Motion_Status Delta_X Delta_Y Operation_Mode Configuration Image_Quality R/W R R R R R R/W R/W R Default 0x30 0x2N Data Type Eight bits [11:4] number with the product identifier Four bits [3:0] number with the product identifier Reserved [3:0] number is reserved for future Bit field Eight bits 2's complement number Eight bits 2's complement number Bit field Bit field Eight bits unsigned integer
3.2 Register Descriptions
0x00 Bit Field Usage 0x01 Bit Field Usage 7 6 PID[3:0] 5 7 6 5 Product_ID 4 PID[11:4] The value in this register can't change. It can be used to verify that the serial communications link is OK. Product_ID 4 3 2 1 0 Reserved [3:0] 3 2 1 0
The value in this register can't change. PID[3:0] can be used to verify that the serial communications link is OK. Reserved [3:0] is a value between 0x0 and 0xF, it can't be used to verify that the serial communications.
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0x02 Bit Field Usage 7 Motion 6 5 Reserved[6:5] Motion_Status 4 DYOVF 3 DXOVF 2 1 RES[2:0] 0
CMOS Optical Mouse Sensor
Register 0x02 allows the user to determine if motion has occurred since the last time it was read. If so, then the user should read registers 0x03 and 0x04 to get the accumulated motion. It also tells if the motion buffers have overflowed since the last reading. The current resolution is also shown. Reading this register freezes the Delta_X and Delta_Y register values. Read this register before reading the Delta_X and Delta_Y registers. If Delta_X and Delta_Y are not read before the motion register is read a second time, the data in Delta_X and Delta_Y will be lost.
Notes
Field Name Motion Reserved[6:5] DYOVF
Description Motion since last report or PD 0 = No motion (Default) 1 = Motion occurred, data ready for reading in Delta_X and Delta_Y registers Reserved for future Motion Delta Y overflow, Y buffer has overflowed since last report 0 = No overflow (Default) 1 = Overflow has occurred Motion Delta X overflow, X buffer has overflowed since last report 0 = No overflow (Default) 1 = Overflow has occurred Resolution in counts per inch 000 = 400 001 = 500 010 = 600 011 = 800 100 = 1000 Delta_X
DXOVF
RES[2:0]
0x03 Bit Field Usage 0x04 Bit Field Usage 7 Y7 6 Y6 5 Y5 4 Y4 7 X7 6 X6 5 X5 4 X4
3 X3
2 X2
1 X1
0 X0
X movement is counts since last report. Absolute value is determined by resolution. Reading clears the register. Report range -128~+127. Delta_Y 3 Y3 2 Y2 1 Y1 0 Y0
Y movement is counts since last report. Absolute value is determined by resolution. Reading clears the register. Report range -128~+127.
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0x05 Bit Field Usage 7 LEDsht_enh 6 XY_enh 5 Reserved
Operation_Mode 4 Slp_enh 3 Slp2au 2 Slp2mu 1 Slp1mu 0 Wakeup
Register 0x05 allows the user to change the operation of the sensor. Shown below are the bits, their default values, and optional values. Operation_Mode[4:0] "0xxxx"=Disable sleep mode "10xxx"=Enable sleep mode1 "11xxx"=Enable sleep mode2 "1x100"=Force enter sleep23 "1x010"=Force enter sleep13 "1x001"=Force wakeup from sleep mode3 Notes: 1. Enable sleep mode, but disable automatic entering sleep2 mode, that is, only 2 modes will be used, normal mode and sleep1 mode. After 200 ms not moving during normal mode, the chip will enter sleep1 mode, and keep on sleep1 mode until moving is detected or wakeup is asserted. 2. Enable sleep mode full function, that is 3 modes will be used, normal mode, sleep1 mode and sleep2 mode. After 200 ms not moving during normal mode, chip will enter sleep1 mode, and keep on sleep1 mode until moving is detected or wakeup is asserted. And after 30 sec not moving during sleep1 mode, the chip will enter sleep2 mode, and keep on sleep2 mode until detect moving or force wakeup to normal mode. Mode Sampling rate @3000frame/sec Active duty cycle @3000frame/sec Sleep1 77/sec 3.8% Sleep2 8/sec 0.4% 3. Only one of these three bits slp2mu_enh, slp1mu_enh, and wakeup can be set to 1 at the same time, others have to be set to 0. After a period of time, the bits, which was set to 1, will be reset to 0 by internal signal. Field Name LEDsht_enh Description LED shutter enable / disable 0 = Disable 1 = Enable (Default) XY quadrature output enable/disable 0 = Disable 1 = Enable (Default) Reserved for future Sleep mode enable/disable 0 = Disable 1 = Enable (Default) Automatic enter sleep2 mode enable/disable 0 = Disable 1 = Enable (Default) Manual enter sleep2 mode, set "1" will enter sleep2 and this bit will be reset to "0" Manual enter sleep1 mode, set "1" will enter sleep2 and this bit will be reset to "0" Manual wake up from sleep mode, set "1" will enter wakeup and this bit will be reset to "0" 6 V1.0, Mar. 2006
Notes
XY_enh Reserved Slp_enh
Slp2au Slp2mu Slp1mu Wakeup
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0x06 Bit Field Usage Notes 7 Reset 6 Reserved 5 Cpimd Configuration 4 Swk_enh 3 PD 2 Reserved 1 CPI [1:0] 0
CMOS Optical Mouse Sensor
The Configuration register allows the user to change the configuration of the sensor. Shown below are the bits, their default values, and optional values. Field Name Reset Reserved[7:4] Cpimd PD Reserved Description Full chip reset 0 = Normal operation mode (Default) 1 = Full chip reset Reserved for future Cpi mode select Power down mode 0 = Normal operation (Default) 1 = Power down mode Reserved for future Output resolution setting, setting with cpi mode select bit (Cpimd) Cpimd = 0 00 = 800 01 = 400 10 = 400 11 = 600 Cpimd = 1 00 = 1000 01 = 500 10 = 500 11 = 800 Image_Quality 7 6 5 4 Imgqa[7:0] Image Quality is a quality level of the sensor in the current frame. Report range 0~255. The minimum level for normally working is 15. Field Name Imgqa[7:0] Description Image quality report range: 0(worst) ~ 255(best). 3 2 1 0
CPI[1:0]
0x07 Bit Field Usage Notes
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4. Specifications
Absolute Maximum Ratings Stresses above those listed under "Absolute Maximum Rating" may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability. Symbol TSTG TA VDC VIN Parameter Storage temperature Operating Temperature DC supply voltage DC input voltage Lead Solder Temp ESD Recommend Operating Condition Symbol Parameter TA Vdd1 Vdd2 VN Z R A SCLK CL FCLK FR Operating Temperature Power supply voltage Supply noise Distance from lens reference plane to surface Resolution Acceleration Serial Port Clock Frequency Load capacitance of resonator Clock Frequency Frame Rate Min. 0 1.73 2.5 2.3 400 15 Typ. 1.8 2.7 2.4 800 Max. 40 1.87 2.9 100 2.5 1000 TBD 10 30 Unit C V mV mm cpi g MHz pF MHz 15 pF @ FCLK=24.567MHz 30 pF @ FCLK=18.432MHz Set by crystal or ceramic resonator. VDDD, VDDA, VDD short VDD Peak to peak within 0-100 MHz Refer to Figure 4. Notes Min -40 -15 -0.5 -0.5 -0.5 Max 85 55 Vdd1 + 0.2 Vdd2 + 0.3 VDC 260 2 Unit C V V V C kV All I/O pin For 10 seconds, 1.6mm below seating plane. All pins, human body model MIL 883 Method 3015 Notes
12.000 18.432 24.576 1953 3000
1953 frames/s @ FCLK=12.000MHz 4000 Frames/s 3000 frames/s @ FCLK=18.432MHz 4000 frames/s @ FCLK=24.567MHz 37 18 inches/s @ FCLK=12.000MHz Inches/s 28 inches/s @ FCLK=18.432MHz 37 inches/s @ FCLK=24.567MHz
S
Speed
18
28
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Package Lid Lens
Z OBJECT SURFACE
Figure4. Distance from Lens Reference Plane to Surface
+X
+Y
ESD LENS RING
BASE PLATE
PLASTIC SPRING
CLIP
LED
SURFACE IS 0 REF. PCB SENSOR BASE PLATE ALIGNMENT POST
Unit: mm
Figure5. 2D assembly
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AC Operating Condition Electrical Characteristics over recommended operating conditions. Typical values at 25 C, VDD =1.8 V, pin 5,8,9 short, FCLK=18.432MHz Symbol Parameter tPDR tPD tPDW PD Pulse Register Power Down PD Pulse Width Min. Typ. Max. Unit 700 500 333 us us us Notes One frame time maximum after setting bit 3 in the Configuration register @3000frame/sec. (Refer to Figure 16) From PD. (Refer to Figure 14) Pulse width to reset the serial interface. (Refer to Figure 14)
CMOS Optical Mouse Sensor
tPUPD
Power Up from PD
TBD
-
TBD
From PD to valid quad signals. After tPUPD, all registers contain valid data from first image after PD. Note that an additional TBD frames for ms Auto-Exposure (AE) stabilization may be required if mouse movement occurred while PD was high. (Refer to Figure 14) ms us us From VDD to valid quad signals. 500usec + TBD frames. Minimum hold time for valid data. (Refer to Figure 11) @3000frame/sec (Refer to Figure 13)
tPU tHOLD
Power Up from VDD SDIO read hold time
TBD 1 1.7 160 -
3 333 25, 20 30, 25 10, 10
TBD -
tRESYNC Serial Interface RESYNC. tSIWTT tSWKINT tr,tf tr,tf tr,tf Serial Interface Watchdog Timer Timeout Sensor wakeup interrupt time Rise and Fall Times: SDIO Rise and Fall Times: XA, XB, YA, YB Rise and Fall Times: ILED
ms @3000frame/sec (Refer to Figure 13) us ns ns ns CL = 30pf CL = 30pf LED bin grade: R; R1=100ohm
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DC Electrical Characteristics Electrical Characteristics over recommended operating conditions. Typical values at 25 C, VDD =1.8 V, pin 5,8,9 short, FCLK=18.432MHz Symbol Parameter Min. Typ. Max. Unit
Type: Power Supply Current IDD Mouse moving (Normal) Supply Current IDD Mouse not moving (sleep1) Supply Current IDD Mouse not moving (Sleep2) Supply Current IDDPD (Power Down) Type: SCLK, SDIO, PD VIH VIL VOL VOH VOL Input voltage HIGH Input voltage LOW Output voltage LOW Output voltage HIGH Output voltage LOW 1.2 1.25
4.5 600 100 30
mA uA uA PD, SCLK, SDIO = high uA
0.5 300
V mV @I OL = 25mA V @I OH = 2mA @I OL = 2mA
Type: LED
Type: XA, XB, YA, YB 0.2 V
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5. Quadrature Mode
The quadrature state of the PAN3201DH tells mouse controller which direction the mouse is moving in. The output format is two channels quadrature (X and Y direction), which emulates encoder phototransistors. The DSP generates the x and y relative displacement values that are converted into two channel quadrature signals. The following diagrams show the timing for positive X motion, to the right or positive Y motion, up.
5.1 Quadrature Output Timing
X motion to the right Y motion up XA/YA
FOUR
XB/YB
83.3us
83.3us
83.3us
83.3us
XA/YA
THREE
XB/YB
83.3us
83.3us
166.7us
XA/YA
TWO
XB/YB
83.3us
250us
XA/YA
ONE
XB/YB
333.3us
333.3us @ 3000frames/second
Figure6. Quadrature output timing
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5.2 Quadrature Output State Machine
The following state machine shows the states of the quadrature output pins. The three things to note are that state 0 is entered after a power on reset. While the PD pin is asserted, the state machine is halted. Once PD is deasserted, the state machine picks up from where it left off. During times of mouse no movement will entry power saving mode, until mouse was moved.
PD POWER ON RESET STATE 0 (0,0)
IO N + EC T IR D T EC
IR
IO
D
N
-D
N IO
EC T
+
X/Y output STATE XA/YA XB/YB 0 1 1 0 0 PD 1 2 3 0 1 1 0
E IR
-D IR
N IO CT
PD
STATE 1 (0,1)
IO N
STATE 3 (1,0)
-D IR E
E IR -D N IO CT T EC N IO
CT
STATE 2 (1,1) PD
Figure7. State machin
5.3 Quadrature Output Waveform
The following diagrams show the waveform of the two channel quadrature outputs. If the X, Y is motionless, the (XA, XB), (YA, YB) will keep in final state. Each state change (ex. STATE2 STATE3) is one count.
X MOTION TO THE RIGHT Y MOTION UP ( + DIRECTION )
XA/YA
XB/YB STATE3 (1,0) STATE0 (0,0) STATE1 (0,1) STATE2 (1,1) STATE3 (1,0) STATE0 (0,0)
+
D
IR
EC T
IO N
+ IR D
+1
+1
+1
+1
+1
MOTION COUNT
XA/YA
X MOTION TO THE LEFT Y MOTION DOWN ( - DIRECTION )
XB/YB STATE1 (0,1) STATE0 (0,0) STATE3 (1,0) STATE2 (1,1) STATE1 (0,1) STATE0 (0,0)
-1
-1
-1
-1
-1
MOTION COUNT
Figure8. Quadrature output waveform
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6. Serial Interface
The synchronous serial port is used to set and read parameters in the PAN3201DH, and can be used to read out the motion information instead of the quadrature data pins. SCLK: The serial clock line. It is always generated by the host micro-controller. SDIO: The serial data line used for write and read data. PD: A third line is sometimes involved. PD(Power Down pin) is usually used to place the PAN3201DH in a low power mode to meet USB suspend specification. PD can also be used to force re-synchronization between the micro-controller and the PAN3201DH in case of an error.
6.1 Transmission Protocol
The transmission protocol is a two-wire link, half duplex protocol between the micro-controller and PAN3201DH. All data changes on SDIO are initiated by the falling edge on SCLK. The host micro-controller always initiates communication; the PAN3201DH never initiates data transfers. The transmission protocol consists of the two operation modes: - Write Operation. - Read Operation. Both of the two operation modes consist of two bytes. The first byte contains the address (seven bits) and has a bit7 as its MSB to indicate data direction. The second byte contains the data.
FIRST BYTE R /W (1 BIT) ADDRESS (7 BIT) SECOND BYTE DATA (8 BIT)
MSB
LSB
MSB
LSB
Figure9. Transmission Protocol
6.1.1 Write Operation
A write operation, which means that data is going from the micro-controller to the PAN3201DH, is always initiated by the micro-controller and consists of two bytes. The first byte contains the address (seven bits) and has a "1" as its MSB to indicate data direction. The second byte contains the data. The transfer is synchronized by SCLK. The micro-controller changes SDIO on falling edges of SCLK. The PAN3201DH reads SDIO on rising edges of SCLK.
SCLK SDIO
DON'T CARE
1 1
2 A6
3 A5
4 A4
5 A3
6 A2
7 A1
8 A0
9 D7
10 D6
11 D5
12 D4
13 D3
14 D2
15 D1
16 D0
DON'T CARE
SDIO driven by Micro-controller
Figure10. Write Operation
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6.1.2 Read Operation
A read operation, which means that data is going from the PAN3201DH to the micro-controller, is always initiated by the micro-controller and consists of two bytes. The first byte contains the address, is written by the micro-controller, and has a "0" as its MSB to indicate data direction. The second byte contains the data and is driven by the PAN3201DH. The transfer is synchronized by SCLK. SDIO is changed on falling edges of SCLK and read on every rising edge of SCLK. The micro-controller must go to a high Z state after the last address data bit. The PAN3201DH will go to the high Z state after the last data bit.
SCLK SDIO
DON'T CARE
1 0
2 A6
3 A5
4 A4
5 A3
6 A2
7
8
9 D7
10 D6
11 D5
12 D4
13 D3
14 D2
15 D1
16 D0
R/W bit of next address
A1 A0
SDIO driven by Micro-controller Note "A"
SDIO driven by sensor Note "B"
1. Micro-controller send address to sensor 2. Micro-controller release and set SDIO to Hi-Z after the last address bit. SCLK SDIO 7 A1 A0 tHOLD 3us,min 1. Sensor send data to Micro-controller . 2. Sensor release and set SDIO to Hi-Z after the last data bit. SCLK SDIO 16 Hi-Z D0 8 Hi-Z 9 D7
1 R/W bit of next address SDIO driven by micro-controller
Figure11. Read Operation
6.2 Re-Synchronous Serial Interface
There are times when the SDIO line from the PAN3201DH should be in the Hi-Z state. If the microprocessor has completed a write to the PAN3201DH, the SDIO line is Hi-Z, since the SDIO pin is still configured as an input. However, if the last operation from the microprocessor was a read, the PAN3201DH will hold the D0 state on SDIO until a rising edge of SCLK. To place the SDIO pin into the Hi-Z state, first raise the PD line, and then toggle the SCLK line from high to low to high. The SDIO line will now be in the Hi-Z state. The PAN3201DH and the micro-controller might get out of synchronization due to following condition.
PD SCLK SDIO Hi-Z 1us,min
1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6
ADDRESS(R/W)
DATA
Figure12. Forcing PAN3201DH SDIO line to the Hi-Z stat
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6.2.1 USB Suspend
Termination of a transmission by the micro-controller may sometimes be required (for example, due to a USB suspend interrupt during a read operation). To accomplish this, the micro-controller should raise PD. The PAN3201DH will not write to any register and will reset the serial port (but nothing else) and be prepared for the beginning of future transmissions after PD goes low.
6.2.2 Firmware Flaws Error, or Others Error
The PAN3201DH and the micro-controller might get out of synchronization due to micro-controller firmware flaws. The PD pin can stay high, with the PAN3201DH in the shutdown state, or the PD pin can be lowered, returning the PAN3201DH to normal operation. If the microprocessor and the PAN3201DH get out of sync, then the data either written or read from the registers will be incorrect. In such a case, an easy way to solve this is to raise PD to re-sync the parts after an incorrect read. The PAN3201DH will reset the serial port but will not reset the registers and be prepared for the beginning of a new transmission.
6.2.3 Power On Problem
The problem occurs if the PAN3201DH powers up before the microprocessor sets the SCLK and SDIO lines to be output.
6.3 Collision Detection on SDIO
The only time that the PAN3201DH drives the SDIO line is during a READ operation. To avoid data collisions, the micro-controller should release SDIO before the falling edge of SCLK after the last address bit. The PAN3201DH begins to drive SDIO after the next falling edge of SCLK. The PAN3201DH release SDIO of the rising SCLK edge after the last data bit. The micro-controller can begin driving SDIO any time after that. In order to maintain low power consumption in normal operation or when the PD pin is pulled high, the microcontroller should not leave SDIO floating until the next transmission (although that will not cause any communication difficulties).
6.4 Serial Interface Watchdog Timer Timeout
When there are only two pins to read register from PAN3201DH, and PD pin can't be used to re-synchronous function. If the microprocessor and the PAN3201DH get out of sync, then the data either written or read from the registers will be incorrect. In such a case, an easy way to solve this condition is to toggle the SCLK line from high to low to high and wait at least tSIWTT to re-sync the parts after an incorrect read. The PAN3201DH will reset the serial port but will not reset the registers and be prepared for the beginning of a new transmission.
tSIWTT SCLK tRESYNC 1us, min SDIO
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Hi-Z
ADDRESS(R/W) DATA
Figure13. Re-synchronous serial interface using watchdog timer timeout
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6.5 Power Down Mode
There are two different ways to entry power down mode, using the PD line or register setting.
6.5.1 PD Line Power Down Mode
To place the PAN3201DH in a low power mode to meet USB suspend specification, raise the PD line at least 700us. Then PD line can stay high, with the PAN3201DH in the shutdown state, or the PD pin can be lowered, returning the PAN3201DH to normal operation.
Figure14. Power Down Minimum Pulse Width
PD SCLK SDIO
tPDW 700us,min
1 2 34 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6
Hi-Z
ADDRESS(R/W)
DATA
Figure15. PD Line Power Down Mode
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6.5.2 Register Power Down Mode
PAN3201DH can be placed in a power-down mode by setting bit 3 in the configuration register via a serial port write operation. After setting the configuration register, wait at least 1frame times. To get the chip out of the power-down mode, clear bit 3 in the configuration register via a serial port write operation. In power-down mode, the serial interface watchdog timer is not available. But, The serial interface still can read/write normally. For an accurate report after leave power down mode, wait about 3ms before the micro-controller is able to issue any write/read operation to the PAN3201DH.
Figure16. Power-down configuration register writing operation
6.6 Error Detection
1.The micro-controller can verify success of write operations by issuing a read command to the same address and comparing written data to read data. 2. The micro-controller can verify the synchronization of the serial port by periodically reading the product ID register
7. SWKINT Timing
When the PAN3201DH is in sleep mode and the micro-controller is also in sleep mode, if the PAN3201DH finds motion occurred at this moment, PAN3201DH will wake micro-controller up promptly via SWKINT.
Figure13. SWKINT Timing
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8. Referencing Application Circuit 8.1 2.7V Application Circuit (with Red LED)
#1. Battery Power Circuit
DC/DC Converter
BAT_1.5V L1 220uH U1 C1 47uF C2
GND SW VOUT
VCC_2.7V D2 1N5819
LED_2.7V
VCC_2.7V
ENSW1
Z2 COM Z1
Z2 Z1
ENCODER SW1 SW2 SW3 RKEY MKEY LKEY
47uF ELM9327
#2. MCU Circuit VCC_2.7V IDSYNC SWKINT R2 30K C3 0.1uF Z1 Z2 RKEY MKEY #3. Sensor Circuit LED_2.7V R1 RESET
1 2 3 4 5 6 7 8 9
U2
P52 P53 TCC /RESET VSS P60./INT P61 P62 P63 P51 P50 OSCI OSCO VDD P67 P66 P65 P64 18 17 16 15 14 13 12 11 10
C5 15pF RFEN RFDATA X1 6MHz VCC_2.7V C4 0.1uF C6 15pF
SCLK SDIO PD LKEY
MCU
1
U3
VSS_LED LED OSCOUT OSCIN VDDD VSSD VSSA VDD VDDA VREF PD SDIO SCLK SWKINT NC CPI XB XA YB YA 20 19 18 17 16
PD SDIO VCC_2.7V SCLK SWKINT VCC_2.7V JP1 IDSYNC R3 20K
D1
2
LED C7 C8 30pF 30pF X2 18.432MHz C9
6 3 4 5
15 14 13 12 11
VCC_2.7V
1uF
7 8 9 10
JP2
S1
+
C10 10uF
C11 0.1uF C12
Pin15(CPI)
JP1, JP2 open, short short, open open, open R9 10R
control
state
1uF
C13 0.1uF
PAN3201DH
=> GND (800CPI) => VCC (600CPI) => Floating (400CPI)
#4. RF TX Circuit RFEN C14 0.1uF GND R5 10K R4 27K 3904
VCC_2.7V C19 R7 X3 13.5225MHz 36K Q1 3904 C17 C15 27pF R6 C18 33pF R8 2K C22 100pF C16 0.1uF R10 56K Q3 3904 100pF C23 100p C24 1uF C20 0.1u C21 1u
RFDATA
Q2
10pF 100K
Figure14. Application Circuit for 2.7V (with Red LED)
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8.2 1.8V Application Circuit (with Red LED)
#1. Battery Power Circuit
A. DC/DC Converter
BAT_1.5V L1 220uH U1 C1 47uF C2
GND SW VOUT
B. Regulator
VCC_1.8V U2 BAT_3.0V
VIN PAD VOUT GND VIN
ELM9818
BAT_1.5V L2 220uH U3 D3 1N5819
LED_2.7V
D2 1N5819
VCC_1.8V C6
GND SW VOUT
C3 22uF
C4 22uF
C5 47uF
100uF ELM9318
100uF ELM9327
GND
Optional power source: A or B
#2. MCU Circuit VCC_1.8V R2 30K RESET Z1 Z2 RKEY MKEY #3. Sensor Circuit LED_2.7V R1 IDSYNC SWKINT
1 2 3 4 5
U4
P52 P53 TCC /RESET VSS P60./INT P61 P62 P63 P51 P50 OSCI OSCO VDD P67 P66 P65 P64 18 17 16 15 14 13 12 11 10
C8 15pF RFEN RFDATA X1 6MHz C9 15pF
VCC_1.8V
ENSW1
Z2 COM Z1
Z2 Z1
ENCODER SW1 SW2 RKEY MKEY LKEY
VCC_1.8V SCLK SDIO PD LKEY C10 0.1uF
C7 0.1uF
6 7 8 9
SW3
MCU
1
U5
VSS_LED LED OSCOUT OSCIN VDDD VSSD VSSA VDD VDDA VREF PD SDIO SCLK SWKINT NC CPI XB XA YB YA 20 19 18 17 16
PD SDIO VCC_1.8V SCLK SWKINT VCC_1.8V JP1 IDSYNC R3 20K
D1
2
LED C11 30pF C12 30pF
3
X2 18.432MHz C13
4 5 6
15 14 13 12
VCC_1.8V
1uF
7 8
JP2
S1
C14 + 10uF
C15 0.1uF C16 1uF
9 10
Pin15(CPI)
11
control
state
C17 0.1uF
PAN3201DH
JP1, JP2 open, short short, open open, open
=> GND (800CPI) => VCC (600CPI) => Floating (400CPI)
#4. RF TX Circuit RFEN C18 0.1uF GND R4 27K 3904 RFDATA R5 10K
R9 10R VCC_1.8V C24 R7 X3 13.5225MHz 36K Q1 3904 C20 C19 27pF R6 C21 33pF R8 2K C23 100pF C22 0.1uF R10 56K Q3 3904 100pF C27 100p C28 1uF C25 0.1u C26 1u
Q2
10pF 100K
Figure15. Application Circuit for 1.8V (with Red LED)
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8.3 1.8V Application Circuit (with IR LED)
#1. Battery Power Circuit
Optional power source: A or B
B. Regulator
IR_1.8V VCC_1.8V U2
VIN PAD VOUT GND VIN
A. DC/DC Converter
BAT_1.5V L1 220uH U1 C1 47uF C2
GND SW VOUT
VCC_1.8V ENSW1 ELM9818 IR_1.8V VCC_1.8V C4 22uF
Z2 COM Z1
Z2 Z1
D2 1N5819
BAT_3.0V
ENCODER SW1 SW2 SW3 RKEY MKEY LKEY
1
2
100uF ELM9318
C3 22uF
#2. MCU Circuit VCC_1.8V R2 30K RESET Z1 Z2 RKEY MKEY #3. Sensor Circuit IR_1.8V R1 C9 30pF IDSYNC SWKINT
1 2 3 4 5
U3
P52 P53 TCC /RESET VSS P60./INT P61 P62 P63 P51 P50 OSCI OSCO VDD P67 P66 P65 P64 18 17 16 15 14 13 12 11 10
3
C6 15pF RFEN RFDATA X1 6MHz VCC_1.8V C8 0.1uF C7 15pF
C5 0.1uF
6 7 8 9
SCLK SDIO PD LKEY
MCU
1
U4
VSS_LED LED OSCOUT OSCIN VDDD VSSD VSSA VDD VDDA VREF PD SDIO SCLK SWKINT NC CPI XB XA YB YA 20 19 18 17 16
PD SDIO VCC_1.8V SCLK SWKINT VCC_1.8V JP1 IDSYNC R3 20K
D1
2
LED
3
C10 30pF
X2 18.432MHz C11
4 5 6
15 14 13 12
VCC_1.8V
1uF
7 8
JP2
S1
C12 + 10uF
C13 0.1uF C14 1uF
9 10
Pin15(CPI)
11
control
state
C15 0.1uF
PAN3201DH
JP1, JP2 open, short short, open open, open
=> GND (800CPI) => VCC (600CPI) => Floating (400CPI)
#4. RF TX Circuit RFEN C16 0.1uF GND R5 10K R4 27K 3904
R9 10R VCC_1.8V C22 R7 X3 13.5225MHz 36K Q1 3904 C18 C17 27pF R6 C19 33pF R8 2K C21 100pF C20 0.1uF R10 56K Q3 3904 100pF C25 100p C26 1uF C23 0.1u C24 1u
RFDATA
Q2
10pF 100K
Figure16. Application Circuit for 1.8V (with IR LED)
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8.4 Typical Application for RF Receiver
C1
20pF
C2 2.2uF
+
C4 10nF VCC_RF
1 2 3 4 5 OSC_IN 6 OSC_OUT 7 8 B3 9 10
C3 U1
68pF C6
20 19 18 17 16 15 14 13 12 11
C5 2.2uF
+
C8 10uF
+
C9 0.1uF
ANT_IN1 ANT_IN2 AGND VNEG VPOS MDR VCC LF VDIG AGND XTAL_IN VPOS_LO XTAL_OUT VNEG_LO VNEG_DIG B1 B3 OUT B2 CLK
10nF
C7
2.2uF
B1 RF_DATA
C11 C10 10nF 2.2uF
+
TI TRF7903-PW20 C12 2.2uF
+
C13 10nF
OSC_IN
OSC_OUT
VCC_RF
C14 R2 47pF
X1 12MHz
C15 47pF VCC_RF
8 7 6 5
VCC_5V
VCC_RF
R1 B1 OPEN B3
Q1 2N3906 R3 10K R6 PWR_Ctrl 10K
0R
1 2 3 4
U2
A0 VCC A1 WP A2 SCL GND SDA
R4 0R
R5 OPEN
SCL SDA
C16 0.1uF
2402 U3
RF_DATA VCC_RF R8 470 D1 S1 LED ID_SYNC PWR_Ctrl
1 2 3 4 5
P0.0 P0.1 P0.2 P0.3 P1.0
VREG D-/SDATA D+/SCLK VCC
11 15 16 14
R7
1.3K
JP1
1
VCC_5V C17
+
2 3 4
C18 10uF
VPP VSS P0.5 P0.6 12 XTALIN XTALOUT
10 9 23 22 13
0.1uF
USB
SCL SDA
CYPRESS CY7C63723
Figure17. Application circuit for RF Receive
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8.5 PCB Layout Consideration
1. Caps for pins 5, 8, 9, 10 MUST have trace lengths LESS than 5mm. 2. The trace lengths of OSCOUT, OSCIN must less than 6mm.
8.6 Recommended Value for R1 8.6.1 Using Red LED
Radiometric intensity of red LED Bin limits (mW/Sr at 20mA) LED Bin Grade N P Q Suggested R1: Red LED Bin Grade N P Q Suggested R1 (ohm) 12 12 12 Min. 14.7 17.7 21.2 Typ. Max. 17.7 21.2 25.4
Note: Tolerance for each bin will be 15%
8.6.2 Using IR LED
Suggested R1: IR LED Bin Grade TBD Suggested R1 (ohm) 0
It is not guaranteed that the performance of PAN3201DH with IR LED is as good as PAN3201DH with red LED. PAN3201DH is designed to a very good match with red LED, and this combination has the best performance.
8.6.3 Summary
Light Source Red LED IR LED LED Bin Grade N, P, Q TBD VDD 2.7 1.8 R1 (ohm) 12 0
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9. Package Information 9.1 Package Outline Drawing
20 19 18 17 16 15 14 13 12 11
1
2
3
4
5
6
7
8
9
10
19.30 0.760
3.20 0.126
9.98 0.393
1.02 0.040
5.08 0.200 0.254 0.010
0.457 0.018
1.778 0.070
1.46 0.0575
5 - 12 14.22 0.560
13.589 0.535 11.938 0.470 1 2 3 4 5 6 7 8
5.715 0.225 4.064 0.160 9 10
5.080 0.200
4.55 0.179 20 19 18 17 16 15 14 13 12 11
NOTES: 1. All dimensions in MM/INCH. 2. All dimensions tolerance: +/- 0.10mm 3. Maxmumflash: +0.2mm
5.56 0.2189
0.800 0.031
Figure 18. Package outline drawing
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9.2 Recommended PCB Mechanical Cutouts and Spacing
4.064 0.160 2.286 0.090 6.985 0.275 4.445 0.175 1.194 0.047 10.998 0.433 0 ref. 16.942 0.667 27.153 1.069
26.010 1.024
7.544 0.297
0.711 0.028 Optical Center
0 ref.
1.194 0.047 4.445 0.175 6.985 0.275 0.711 0.028
3.251 0.128
7.544 0.297
All Dimensions : mm / inch
Figure 19. Recommended PCB mechanical cutouts and spacing
10. Update History
Version V1.0 Update Creation, Preliminary 1st version Date 03/02/2006
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